1. Field of the Invention
The present invention relates to an image display device, and more particularly to a low-cost image display device and a manufacturing method thereof.
2. Description of the Related Art
An excellent feature of polycrystalline silicon thin-film transistors (denoted by TFT) is that the mobility therein is by two or more orders of magnitude higher than that in amorphous silicon TFT. For example, an active-matrix liquid crystal display device described in Society for Information Displays, International Symposium, Digest of Technical Papers p. 172 (1999) is a device using such an advantage of polycrystalline silicon TFT. This image display device is a flat device called “flat panel display” (FPD). By configuring part of a peripheral driver circuit of the display device of polycrystalline silicon TFT, the number of contact terminals of pixel units and the peripheral driver circuit can be reduced and a high-resolution image display can be realized.
FIG. 2 shows circuit configuration of the conventional image display device. A plan view of a CMOS thin-film transistor (MOS) 2 configuring a peripheral driver circuit 1 of this image display device and a plan view of a pixel 3 are shown in FIG. 3 and FIG. 4, respectively. A method for manufacturing the conventional image display device will be described below with reference to FIGS. 5A to 5G by using the cross sections A-A′, B-B′, and C-C′ shown in FIG. 3 and FIG. 4. The A-A′ cross section is a portion of a p-channel TFT, the B-B′ cross section is a portion of an n-channel TFT, and the C-C′ cross section is a portion of a pixel electrode.
A silicon oxide film BUF is deposited to a thickness of 100 nm as a buffer layer on a glass substrate SUB that is an insulating substrate, and then an amorphous silicon layer is deposited to a thickness of 50 nm by plasma enhanced chemical vapor deposition. The amorphous silicon layer is then crystallized by irradiation with a XeCl excimer laser beam, and an island-like polycrystalline silicon layer PSI is obtained by a well-known photo photolithography-etching process (photo process 1) (FIG. 5A). A gate insulating film OX1 is then deposited to a thickness of 100 nm by plasma enhanced chemical vapor deposition and boron ions are implanted to adjust the threshold value of the n-channel TFT. A region of the n-channel TFT is then covered with a resist by a well-known photolithography process (photo process 2), and phosphorus ions are then implanted to adjust the threshold value of the p-channel TFT (FIG. 5B).
A metal film comprising, for example, tungsten (W) is then deposited and a gate electrode GM and a gate line GL are formed by a well-known photolithography process (photo process 3) (see FIG. 4). A lightly-doped n-type polycrystalline silicon layer LDN is then formed by ion implantation of phosphorus by using the gate electrode as a mask (FIG. 5C). Parts of the lightly-doped n-type polycrystalline silicon layer LDN and the gate electrode are covered with a resist by a well-known photolithography process (photo process 4) and a highly-doped n-type polycrystalline silicon layer HDN is formed by using the resist as a mask (FIG. 5D). A region of the n-channel TFT is then covered with a resist by a well-known photolithography process (photo process 5), and a highly-doped p-type polycrystalline silicon layer HDP is formed by using the resist as a mask (FIG. 5E).
An interlayer insulating film OX2 is then formed by plasma enhanced chemical vapor deposition so as to cover the entire surface, and a contact hole CNT1 is formed by a well-known photo photolithography-etching process (photo process 6). Then, a metal layer comprising, for example, aluminum (Al) is deposited and a source/drain electrode SDM and a signal line are formed by a well-known photo photolithography-etching process (photo process 7) (FIG. 5F).
A passivation film PAS1 comprising silicon nitride (SiN) and a passivation film PAS2 comprising an organic material are then formed so as to cover the entire surface, and a contact hole CNT2 is formed by a well-known photo photolithography-etching process (photo process 8). A pixel electrode PX comprising Indium Tin Oxide (ITO) is then formed by a well-known photo photolithography-etching process (photo process 9) (FIG. 5G).